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XD010-24S-D2F
Product Description
Sirenza Microdevices' XD010-24S-D2F 12W power module is a robust 2stage Class A/AB amplifier module for use in the driver stages of CDMA RF power amplifiers. The power transistors are fabricated using Sirenza's latest, high performance LDMOS process. This unit operates from a single voltage and has internal temperature compensation of the bias voltage to ensure consistant performance over the full temperature range. It is internally matched to 50 ohms.
1930-1990 MHz Class A/AB 12W CDMA Driver Amplifier
Functional Block Diagram
Stage 1 Stage 2
Product Features
Temperature Compensation
Temperature Compensation
* * * * * * *
4 5
50 W RF impedance 12W Output P1dB Single Supply Operation : Nominally 28V High Gain: 28 dB at 1960 MHz High Efficiency: 26% at 1960 MHz Advanced, XeMOS LDMOS II FETS Temperature Compensation
1
2
3
RF in
VD1
VD2 Case Flange = Ground
RF out
* * * *
Applications
Base Station PA driver Repeater CDMA GSM / EDGE
Key Specifications
Symbol Frequency P1dB Gain Gain Flatness IRL Efficiency Parameter Frequency of Operation Output Power at 1dB Compression Gain at 1W Output Power Peak to Peak Gain Variation, 1930-1990MHz Input Return Loss 1W Output Power, 1930-1990MHz Drain Efficiency at 10W CW output Drain Efficiency at 2W CDMA (Single Carrier IS-95, 9 Ch Fwd) Drain Efficiency at 1W CDMA (Single Carrier IS-95, 9 Ch Fwd) ACPR at 1W CDMA Power Output (Single Carrier IS-95, 9 Ch Fwd, Offset=750KHz, ACPR Integrated Bandwidth) Linearity ALT-1 at 2W CDMA (Single Carrier IS-95, 9 Ch Fwd, Offset=1980 KHz, ACPR Integrated Bandwidth) 3rd Order IMD at 10W PEP (Two Tone; 1MHz) Delay Phase Linearity RTH, j-l RTH, j-2 Signal Delay from Pin 1 to Pin 5 Deviation from Linear Phase (Peak to Peak) Thermal Resistance Stage 1 (Junction to Case) Thermal Resistance Stage 2 (Junction to Case) Unit MHz W dB dB dB % % % dB dB dBc nS Deg C/W C/W -27 10 20 Min. 1930 10 26 12 28 0.4 14 26 12 6.5 -58 -70 -32 2.9 0.5 11 4 1.0 Typ. Max. 1990
Test Conditions: Zin = Zout = 50, VDD = 28.0V, IDQ1 = 230mA, IDQ2 = 150mA, TFlange = 25C
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC 1
http://www.sirenza.com EDS-102932 Rev C
XD010-24S-D2F 1930-1990 MHz 12W Power Amp Module
Quality Specifications
Parameter ESD Rating MTTF Human Body Model, JEDEC Document - JESD22-A114-B 85oC Baseplate, 200oC Channel Unit V H Typical 8000 1.2 X 106
Pin Out Description
Pin # 1 2 3,4 5 Flange Function RF Input VD1 VD2 RF Output Gnd Description Module RF input. Care must be taken to protect against video transients that may damage the active devices. This is the bias feed for the 1st stage of the amplifier module. The gate bias is temperature compensated to maintain constant current over the operating temperature range. See Note 1. This is the bias feed for the 2nd stage of the amplifier module. The gate bias is temperature compensated to maintain constant current over the operating temperature range. See Note 1. Module RF output. Care must be taken to protect against video transients that may damage the active devices. Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for optimum thermal and RF performance. See mounting instructions for recommendation.
Simplified Device Schematic
2 VD1 3 4 VD2
Temperature Compensation Temperature Compensation
RF in 1
Q1
Q2
RF out 5
Case Flange = Ground
Absolute Maximum Ratings
Parameters 1st Stage Bias Voltage (VD1 ) 2
nd
Value 35 35 +20 5:1 +200 -20 to +90 -40 to +100
Unit V V dBm VSWR C C C
Stage Bias Voltage (VD2)
RF Input Power Load Impedance for Continuous Operation Without Damage Output Device Channel Temperature Operating Temperature Range Storage Temperature Range
Note 1: The internally generated gate voltage is thermally compensated to maintain constant quiescent current over the temperature range listed in the data sheet. No compensation is provided for gain changes with temperature. This can only be accomplished with AGC external to the module. Note 2: Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some applications may require energy storage on the drain leads to accommodate time-varying waveforms. Note 3: This module was designed to have its leads hand soldered to an adjacent PCB. The maximum soldering iron tip temperature should not exceed 700 C, and the soldering iron tip should not be in direct contact with the lead for longer than 10 seconds. Refer to app note AN060 (www.sirenza.com) for further installation instructions.
Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation see typical setup values specified in the table on page one.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging and testing devices must be observed.
303 S. Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 2
http://www.sirenza.com EDS-102932 Rev C
XD010-24S-D2F 1930-1990 MHz 12W Power Amp Module
Typical Performance Curves
Gain, Output Power and Efficiency vs. Input Power Freq=1960 MHz, Vdd=28 V, TFlange= 25C
35 Gain (dB), Output Power (W), Efficiency (%) 30 25 20 15 10 5 0 0 0.002 0.004 0.006 Input Power (W) 0.008 0.01 0.012 Gain (dB), Efficiency (%) Pout Gain Efficiency 35 30 25 Gain 20 15 10 5 0 1920 Efficiency ACPR -40 -45 -50 -55 -60 2000 ACPR (dB)
Gain, Efficiency and ACPR vs. Frequency Freq=1960 MHz, Vdd=28 V, TFlange= 25C Output Power=2 Watts
-25 -30 -35
1930
1940
1950
1960
1970
1980
1990
Frequency (MHz)
Gain and Efficiency vs. Output Power and Temperature Freq=1960 MHz, Vdd=28 V, TFlange=-20C, 25C, 90C
35 30 25 Gain (dB) 20 15 10 5 0 0 2 4 6 Output Power (W) 8 10 12 Gain @-20C Gain @ 25C Gain @ 90C Efficiency @-20C Efficiency @ 25C Efficiency @ 90C 5 0 35 30 25 20 15 10 Efficiency (%) Gain (dB), Efficiency (%) 35 30 25 20 15 10 5 0 0
Gain and Efficiency vs. Output Power and Voltage Freq=1960 MHz, Vdd=24V, 28 V, 32 V TFlange= 25C
Gain @ 24 VDC Gain @ 28 VDC Gain @ 32 VDC Efficiency @ 24 VDC Efficiency @ 28 VDC Efficiency @ 32 VDC
2
4
6 Output Power (W)
8
10
12
0 -10 -20 ACPR (dB) -30 -40 -50 -60 -70 0
ACPR and ALT1 vs. Output Power and Temperature Freq=1960 MHz IS-95 Vdd=28 V, TFlange=-20C, 25C, 90C ACPR 885 kHz, 30 kHz ALT1 1.25 MHz, 30 kHz
ACPR @ 25C ACPR @-20C ACPR @ 90C ALT1 @-20C ALT1 @ 25C ALT1 @ 90C
Two Tone IMD vs. Output Power and Temperature Freq=1960, 1961 MHz, Vdd=28 V, TFlange=-20 C, 25 C, 90 C
-30 -40 -50
-20 0 -10 IMD @ 25 C IMD @ 90 IMD @ -20
o o o
ALT1 (dB)
-60 -70 -80 -90 -100 0.5 1 1.5 2 2.5 Output Power (W)
IMD (dBc)
-30 -40 -50 -60 0 1 2 3 Output Power, Avg (W) 4 5 6
303 S. Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 3
http://www.sirenza.com EDS-102932 Rev C
XD010-24S-D2F 1930-1990 MHz 12W Power Amp Module
Test Board Schematic with module attachments shown Test Board Bill of Materials
Component PCB J1, J2 J3 C1, C10 C2, C20 C3, C30 C25, C26 C21, C22 C23, C24 Mounting Screws Description Rogers 4350, er=3.5 Thickness=30mils SMA, RF, Panel Mount Tab W / Flange MTA Post Header, 6 Pin, Rectangle, Polarized, Surface Mount Cap, 10mF, 35V, 10%, Tant, Elect, D Cap, 0.1mF, 100V, 10%, 1206 Cap, 1000pF, 100V, 10%, 1206 Cap, 68pF, 250V, 5%, 0603 Cap, 0.1mF, 100V, 10%, 0805 Cap, 1000pF, 100V, 10%, 0603 4-40 X 0.250" Manufacturer Rogers Johnson AMP Kemet Johanson Johanson ATC Panasonic AVX Various
Test Board Layout
To receive Gerber files, DXF drawings, a detailed BOM, and assembly recommendations for the test board with fixture, contact applications support at support@sirenza.com. Data sheet for evaluation circuit (XD010-EVAL) available from Sirenza website.
303 S. Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 4
http://www.sirenza.com EDS-102932 Rev C
XD010-24S-D2F 1930-1990 MHz 12W Power Amp Module
Package Outline Drawing
Recommended PCB Cutout and Landing Pads for the D2F Package
Note 3: Dimensions are in inches
Refer to Application note AN-060 "Installation Instructions for XD Module Series" for additional mounting info. App note availbale at at www.sirenza.com
303 S. Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 5
http://www.sirenza.com EDS-102932 Rev C

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